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  steering diode tvs array microsemi scottsdale division 8700 e. thomas rd. po box 1390, scottsdale, az 85252 usa, (480) 941 - 6300, fax: (480) 947 - 1503 page 1 copyright ? 2002 mscxxxx.pdf 12 - 03 2002 rev 0 www. microsemi . com scottsdale division srda70 - 4 description tvs array tm series these low capacitance diode arrays are multiple, discrete, isolated junctions fabricated by a planar process and mounted in a so - 8 package for use as steering diodes protecting up to four i/o ports from esd, eft, o r surge by directing them either to the positive side of the power supply line or to ground (see schematic, page 2). an external tvs diode may be added between the positive supply line and ground to prevent overvoltage on the supply rail. these arrays offe r many advantages of integrated circuits such as high - density packaging and improved reliability. this is a result of fewer pick and place operations, smaller footprint, smaller weight, and elimination of various discrete packages that may not be as user friendly in pc board mounting. important: for the most current data, consult microsemi?s website: http://www.microsemi.com features applications / benefits diode array to protect four i/o lines surge protection per iec 61000 - 4 - 2, iec 61000 - 4 - 4 and iec61000 - 4 - 5 (1 kv, 24 a at 8/20 s) ul 94v - 0 flammability classification low capacitance for high - speed interfaces data line protection latch - up protection rs - 232 & rs - 422 interface networks co mputer i/o ports lan maximum ratings mechanical and packaging operating temperature: - 55c to +150c storage temperature: - 55c to +150c peak pulse power : 500 watts (8/20 s, figure 1) peak pulse current : 24 amps (8/20 s, figure 1) pulse rep etition rate: < .01% lead soldering temperature: 260c for 10 seconds molded so - 8 surface mount weight 0.066 grams (approximate) marking: logo, device marking code, date code pin #1 defined by dot on top of package tape & reel per eia standard 481 13 inch reel; 2,500 pieces (optional) carrier tubes; 95 pcs (standard) electrical characteristics peak reverse voltage v rwm volts breakdown voltage v br @50 m a volts forwar d clamping voltage v fc @ 1 amp (figure 2) volts forward clamping voltage v fc @ 10 amp (figure 2) volts reverse leakage current i r @ v rwm a capacitance (f=1 mhz) c @ 0v between i/o pins and ground pf capacitance (f=1 mhz) c @ 0v between i/o pins pf part number device marking max min max max max max typ srda70 - 4 sr70 - 4 70 85 1.3 3.3 5 15 4 srda70 - 4
steering diode tvs array microsemi scottsdale division 8700 e. thomas rd. po box 1390, scottsdale, az 85252 usa, (480) 941 - 6300, fax: (480) 947 - 1503 page 2 copyright ? 2002 mscxxxx.pdf 12 - 03 2002 rev 0 www. microsemi . com scottsdale division srda70 - 4 figure 1 peak pulse power vs pulse time t = sec symbols & definitions symbol definition v br minimum breakdown voltage: the minimum voltage the device will exhibit at a specified current. v rwm working peak reverse voltage : the maximum peak voltage that can be applied over the operating temperature range. v fc forward clamping voltage: the maximum forward clamping voltage across the device when subjected to a given current at a pulse time of 20 s. i r maximum leakage cu rrent: the maximum leakage current at v rwm. c capacitance: the capacitance of the tvs as defined @ 0 volts at a frequency of 1 mhz and stated in picofarads. graphs outline and schematic inches millimeters dim min max min max a 0.188 0.197 4.77 5.00 b 0.150 0.158 3.81 4.01 c 0.053 0.069 1.35 1.75 d 0.011 0.021 0.28 0.53 f 0.016 0.050 0.41 1.27 g 0.050 bsc 1.27 bsc j 0.006 0.010 0.15 0.25 k 0.004 0.008 0.10 0.20 l 0.189 0.206 4.80 5.23 p 0.228 0.244 5.79 6.19 outline schematic s rda70 - 4 ppp peak pulse power (kw) figure 2 pulse wave form pad layout


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